CISC 32-bit processor architecture developed to serve as main hardware building block of the realti...
Abstract of paper on Gmicro/FPU (floating-point unit), defines 23 coprocessor instructions; with re...
Abstract of paper on Gmicro/100, 32-bit CISC VLSI, based on TRON specification; with references, pu...
Abstract of paper on Gmicro/500, with RISC-like dual-pipeline structure to execute basic instructio...